In the manufacture of miniature electronic devices, such as Metal Oxide Semiconductor (MOS) devices, it is frequently necessary to establish electrical connections between two sections of the device by means of a conductive film making contact therebetween. Typically, this conducting film has a portion that overlies an insulating dielectric layer or film and makes contact through small feed-through apertures in that dielectric layer to the underlying areas of the device. To accomplish this a thin layer of dielectric material is deposited on a semiconductor substrate and the feed-through apertures are formed using well known photolithographic masking and chemical etching techniques. Such chemically etched feed-throughs typically have sharp corners resulting in insufficient thickness of conductive material deposited at the corners during subsequent processing steps, which can lead to failure of the device under high current densities.
One solution to this problem is to place the device, with the apertured insulating layer thereon, in a furnace for a predetermined period of time at an elevated temperature until the insulating material reflows to form a smooth surface topography around said apertures. Although such a technique can be most effective, it has been found that undesirable diffusion of dopants within certain devices accompany the high temperature furnace reflow operation.
Accordingly, there is a need for an insulation reflow technique which can form a smooth surface topography around the feed-through apertures without the attendant undesirable dopant diffusion.